This invention relates to a semiconductor memory element of MOS type of which the contents may be electrically rewritten and, more particularly, to a memory circuit having the memory elements arranged in a matrix fashion.
The MOS type memory allowing the rewrite of the contents thereof has well been known and has the following construction. Source and drain regions are formed in a semiconductor substrate of P conductivity type. A first electrode as a floating gate electrode is formed on a channel region between the source and the drain region with a first insulation layer interposed between the first electrode and the channel region. A second gate electrode as a control gate is further formed on the first gate electrode with a second insulation layer interposed between both.
In the write operation, a positive voltage (20 V or more) is applied to the control gate electrode while at the same time a positive voltage is applied to the drain. The transistor operates in a saturation region. Under this condition, an N-channel is formed between the source and the drain. High energy potential electrons arising from inpact ionization in the N-channel region are injected into the first and second insulation layers and attracted toward the control gate electrode with the positive voltage impressed. At this time, the electrons are trapped by the floating gate electrode so that the N-channel disappears and the MOS transistor is turned off. The write operation is carried out as described above.
In the conventional MOS transistor as a memory element, the read operation is at relatively high speed, but the write operation is at low speed, that is to say, it takes a relatively long time, about 2 ms. Further, the voltages applied to the drain and the control gate in the write operation is high, e.g. 20 V or more. This is disadvantageous in fabricating the memory device having the memory elements of this type with high density and large memory capacity.
In the conventional memory element, in order to improve the efficiency of the electron injection into the floating gate, the floating gate electrode is greatly extended into the field region so that a capacitance between the control gate and the floating gate can be larger than that between the floating gate and the substrate and the electric field in the first insulation layer becomes large enough to increase the electron injection. This results in a bulky memory element and therefore is disadvantageous in fabricating the integrated circuit with high density.